High-performance, Low-power AVR® 8-bit Microcontroller
RISC Architecture
118 Powerful Instructions
Most Single Clock Cycle Execution
32 x 8 General Purpose Working Registers
Fully Static Operation
Up to 16 MIPS Throughput at 16 MHz
Data and Non-volatile Program Memory
2K Bytes of In-System Programmable Program Memory Flash
Endurance: 10, 000 Write/Erase Cycles
128 Bytes of In-System Programmable EEPROM
Endurance: 100, 000 Write/Erase Cycles
128 Bytes Internal SRAM
Programming Lock for Flash Program and EEPROM Data Security.
RISC Architecture
118 Powerful Instructions
Most Single Clock Cycle Execution
32 x 8 General Purpose Working Registers
Fully Static Operation
Up to 16 MIPS Throughput at 16 MHz
Data and Non-volatile Program Memory
2K Bytes of In-System Programmable Program Memory Flash
Endurance: 10, 000 Write/Erase Cycles
128 Bytes of In-System Programmable EEPROM
Endurance: 100, 000 Write/Erase Cycles
128 Bytes Internal SRAM
Programming Lock for Flash Program and EEPROM Data Security.