JEDEC standard 1.8V +/- 0.1V Power Supply
VDDQ = 1.8V ± 0.1V
200 MHz fCK for 400MB/sec/pin, 267MHz fCK for 533MB/sec/pin, 333MHz fCK for 667MB/sec/pin, 400MHz fCK for 800MB/sec/pin
4 Banks
Posted CAS
Programmable CAS Latency: 3, 4, 5
Programmable Additive Latency: 0, 1, 2, 3 and 4
Write Latency (WL) = Read Latency (RL) -1
Burst Length: 4, 8(Interleave/nibble sequential)
Programmable Sequential / Interleave Burst Mode
Bi-directional Differential Data-Strobe (Single-ended data-strobe is an optional feature)
Off-Chip Driver (OCD) Impedance Adjustment
On Die Termination with selectable values 50/75/150 ohms or disable)
PASR Partial Array Self Refresh)
Average Refresh Period 7.8us at lower than a TCASE 85º C, 3.9us at 85º C < TCASE < 95 º C- support High Temperature Self-Refresh rate enable feature
Package: 60ball FBGA - 128Mx8
All of Lead-free products are compliant for RoHS
Gold plated contacts
VDDQ = 1.8V ± 0.1V
200 MHz fCK for 400MB/sec/pin, 267MHz fCK for 533MB/sec/pin, 333MHz fCK for 667MB/sec/pin, 400MHz fCK for 800MB/sec/pin
4 Banks
Posted CAS
Programmable CAS Latency: 3, 4, 5
Programmable Additive Latency: 0, 1, 2, 3 and 4
Write Latency (WL) = Read Latency (RL) -1
Burst Length: 4, 8(Interleave/nibble sequential)
Programmable Sequential / Interleave Burst Mode
Bi-directional Differential Data-Strobe (Single-ended data-strobe is an optional feature)
Off-Chip Driver (OCD) Impedance Adjustment
On Die Termination with selectable values 50/75/150 ohms or disable)
PASR Partial Array Self Refresh)
Average Refresh Period 7.8us at lower than a TCASE 85º C, 3.9us at 85º C < TCASE < 95 º C- support High Temperature Self-Refresh rate enable feature
Package: 60ball FBGA - 128Mx8
All of Lead-free products are compliant for RoHS
Gold plated contacts