The ATMEGA8535-16AU is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing instructions in a single clock cycle, the ATMEGA8535-16AU achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed. The ATMEGA8535-16AU provides the following features: 8K bytes of In-System Programmable Flash with Read-While-Write capabilities, 512 bytes EEPROM, 512 bytes SRAM, 32 general purpose I/O lines, 32 general purpose working registers, three flexible Timer/Counters with compare modes, internal and external interrupts, a serial programmable USART, a byte oriented Two-wire Serial Interface, an 8-channel, 10-bit ADC with optional differential input stage with programmable gain in TQFP package, a programmable Watchdog Timer with Internal Oscillator, an SPI serial port, and six software selectable power saving modes. The Idle mode stops the CPU while allowing the SRAM, Timer/Counters, SPI port, and interrupt system to continue functioning. The Power-down mode of the ATMEGA8535-16AU saves the register contents but freezes the Oscillator, disabling all other chip functions until the next interrupt or Hardware Reset. In Power-save mode, the asynchronous timer continues to run, allowing the user to maintain a timer base while the rest of the device is sleeping. The ADC Noise Reduction mode stops the CPU and all I/O modules except asynchronous timer and ADC, to minimize switching noise during ADC conversions.
Parametrics
ATMEGA8535-16AU absolute maximum ratings: (1)Operating Temperature: -55℃ to +125℃; (2)Storage Temperature: -65℃ to +150℃; (3)Voltage on any Pin except RESET with respect to Ground: -0.5V to VCC+0.5V; (4)Voltage on RESET with respect to Ground: -0.5V to +13.0V; (5)Maximum Operating Voltage: 6.0V; (6)DC Current per I/O Pin: 40.0 mA; (7)DC Current VCC and GND Pins: 200.0 PDIP og.
Features
ATMEGA8535-16AU features: (1)High-performance, Low-power AVR 8-bit Microcontroller; (2)Advanced RISC Architecture: 130 Powerful Instructions-Most Single Clock Cycle Execution; 32 x 8 General Purpose Working Registers; Fully Static Operation; Up to 16 MIPS Throughput at 16 MHz; On-chip 2-cycle Multiplier; (3)Nonvolatile Program and Data Memories: 8K Bytes of In-System Self-Programmable Flash; (4)Endurance: 10,000 Write/Erase Cycles; Optional Boot Code Section with Independent Lock Bits: In-System Programming by On-chip Boot Program; true Read-While-Write Operation; 512 Bytes EEPROM, Endurance: 100,000 Write/Erase Cycles; 512 Bytes Internal SRAM; programming Lock for Software Security; (5)Two 8-bit Timer/Counters with Separate Prescalers and Compare Modes; (6)One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture Mode; (7)Real Time Counter with Separate Oscillator; (8)Four PWM Channels; (9)8-channel, 10-bit ADC: 8 Single-ended Channels; 7 Differential Channels for TQFP Package Only; 2 Differential Channels with Programmable Gain at 1x, 10x, or 200x for TQFP Package Only; (10)Byte-oriented Two-wire Serial Interface; (11)Programmable Serial USART; (12)Master/Slave SPI Serial Interface; (13)Programmable Watchdog Timer with Separate On-chip Oscillator; (14)On-chip Analog Comparator; (15)Power-on Reset and Programmable Brown-out Detection; (16)Internal Calibrated RC Oscillator; (17)External and Internal Interrupt Sources; (18)Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby and Extended Standby; (19)I/O and Packages: 32 Programmable I/O Lines; 40-pin PDIP, 44-lead TQFP, 44-lead PLCC, and 44-pad QFN/MLF.